This application is based upon and claims the benefit of priority from the Japanese Patent applications No. P2000-292770, filed on Sep. 26, 2000; the entire contents of which are incorporated herein by reference
1. Field of the Invention
The present invention concerns the circuit design of a semiconductor device such as LSI and is particularly for application in the estimation of a fluctuation of the circuit characteristic, as generated by process fluctuation.
2. Description of the Related Art
Securing a high yield rate from the early stages of mass production is very important for the semiconductor devices, especially, LSI products. The reason is that the high yield rate leads to reduction of cost and turnaround time (TAT). This yield rate rises or falls due to fluctuation of the circuit characteristics. The factor which causes circuit characteristic fluctuation is manufacturing process fluctuation. If the manufacturing process did not fluctuate at all, the circuit characteristic also would not fluctuate, and if the circuit operation could be thus assured, the yield rate of the LSI product could always kept at 100%. However, in practice, it is impossible to remove completely manufacturing process fluctuation.
In order to obtain a high yield rate, it is necessary to estimate the fluctuation of the circuit characteristic due to the fluctuation of the manufacturing process with high accuracy and optimize the circuit based on that estimation result.
However, the estimated device and circuit characteristics sometimes do not coincide with the actual, measured values of the semiconductor device. That is to say, estimated values which emerge in simulation, may not always correspond to those found in practice.
The method for simulating the circuit characteristic of the semiconductor device according to the embodiment of the prevent invention is the obtaining a first characteristic value which most fluctuates a characteristic of an element composing the semiconductor device according to a fluctuation of a parameter of the element; the determining a width of the fluctuation of the parameter which matches a second characteristic value of the worst case of the characteristic of the element with the first characteristic value; and the determining a third characteristic value of the worst case of the circuit characteristic of the semiconductor device based on the width of the fluctuation.